The DEC Programmed Data Processor Model Three (PDP-3) is a high performance, large scale digital computer featuring reliability in operation together with economy in initial cost, maintenance and use. This combination is achieved by the use of very fast, reliable, solid state circuits coupled with system design restraint. The simplicity of the system design excludes many marginal or superfluous features and thus their attendant cost and maintenance problems.
des the title of the instruction, the normal execution time of the instruction, i.e., the time with no indexing and no deferring, the mnemonic code of the instruction, and the operation code number. The notation used requires the following definitions. The contents of a register Q are indicated as C(Q). The address portion of the instruction is indicated by Y. The index register address of an instruction is indicated by x. The effective address of an operand is indicated by Z. Z may be equal to Y or it may be Y as modified by deferring or by indexing.
Indexable Memory Instructions
Add (10 usec.) add x Y Operation Code 40
The new C(AC) are the sum of C(Z) and the original C(AC). The C(Z) are unchanged. The addition is performed with 1's complement arithmetic.
If the sum exceeds the capacity of the Accumulator Register, the overflow flip-flop will be set (see Skip Group instructions).
Subtract (10 usec.) sub x Y Operation Code 4
As a fan of "vintage computing", this is superb. As best as I can determine, the PDP-3 was never an actual product. A single one was built, and not by DEC. I wonder how this document fits into the history of PDP computers? This appears to be a genuine document, but I'm not any sort of exert to ascertain that. A good time-line of PDP's is at:
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